System Verilog Jobs

Job Description Summary An Electrical Engineer learns the practical application of engineering principals on anesthesia machine, achieves expertise in Electrical Engineering, and investigates FPGA platform techniques as part of a team techniques as p

Skills : fpga design , communication , learns , Design Tools , Writing , industrial control , Xilinx , Debug , Creative , Pcb Layout , Dfmea , digital circuit design , english , ide development , Product Design , design documentation , vhdl , Functional Verification , pwb , Electrical , Electrical Engineer , diversity , electrical system , design control , system control , xilinx fpga , Simulation , Prototype , System Design , Debugging , Verilog , Orcad , Firmware , Fpga

Job Description : . Work with the World Trade Sales Organization to drive pre and post-sales technical activities to sell and support High Level Synthesis (HLS) Electronic Design Automation (EDA) tools. . Territory coverage includes primarily custom

Skills : Application Engineer - HLS

工作责： 1负责在emulator上对芯片进行验 2制定emulator验计划，开并维护emulator平，完emulator验工作 3与EDA验团队作，移EDA用例 4与底层软件团队作，支底层软件团队在emulator上测试相关业务 任求： 1有过Cadence Palladium或Synopsys Zebu使用验，建过emulator平，熟悉常用的工具，掌相应的调试方法 2有过在emulator上验大型SOC芯片或者图芯片验者优先 3

Job Description Summary An Electrical Engineer learns the practical application of engineering principals on anesthesia machine, achieves expertise in Electrical Engineering, and investigates FPGA platform techniques as part of a team techniques as p

Skills : fpga design , communication , learns , Design Tools , Writing , industrial control , Xilinx , Debug , Creative , Pcb Layout , Dfmea , digital circuit design , english , ide development , Product Design , design documentation , vhdl , Functional Verification , pwb , Electrical , Electrical Engineer , diversity , electrical system , design control , system control , xilinx fpga , Simulation , Prototype , System Design , Debugging , Verilog , Orcad , Firmware , Fpga

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. * Work closely with the Sales team to identify and scope opportunities for Cadence SoC Verification solution including simulation, E

Skills : Senior Principal Customer Engagement Engineer

Responsibilities 1. Build and verify UVM environment Familiar with automated and reusable development environment 2. Familiar with and execute test plans for coverage targets Familiar with performance verification, power-aware simulation, RTL/FW co-s

Skills : SOC Validation (ARM/RISC -V)

Objectives & Deliverables: * You will be responsible to lead the team to design digital SoCs: * Lead and organize overall digital design tasks, including micro-architecture specification, providing coding guideline, RTL designs, design qual

Responsibilities ByteDance Foundation The architecture innovation center team, with DPU as the core, is committed to exploring the new generation infrastructure of the volcano engine public cloud, and is committed to the research and development and

Skills : Uvm , VHDL , Rtl Design , Python , Perl , Verilog

BU Introduction Cisco IIoT (Industrial Internet of Things) Networking Business Group focus on providing high performance, agile and secure end-to-end network connectivity solutions for Industrial applications, covering verticals like Manufacture, Tra

What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies - building blocks

Skills : Sr. Silicon Design Engineer

About our group: Our team is the top level integration team for Seagate HDD controller ASICs. We integrate IP into a top level SOC, run synthesis, STA, and handoff a netlist to our backend team. We interact with many different teams within Seagate

About Marvell At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world's leading technology companies for 25 years, we move, st

Responsibilities 1. Formulate test plans, extract verification requirements, build IP/SOC verification environment, etc. 2. IP/SOC functional verification, low-power verification, gate-level verification, FPGA verification, etc. 3. Work with RTL desi

Skills : SOC Verification Engineer (video editor decode)

Job Description * Design Verification Engineer Business Line Description: * MCU/MPU Engineering Digital IP team defines and develops components for a wide range of products, including automotive microprocessors, appli

Business Line Description: * NXP is the world leader in secure connectivity solutions for automotive, industrial & IoT, mobile and communication infrastructure markets. NXP's Automotive business unit offers sensor and processing technology that dr

What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies - building blocks

Skills : Sr. Silicon Design Engineer

What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies - building blocks

Skills : MTS Silicon Design Engineer

About Marvell At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world's leading technology companies for 25 years, we move, st

About Marvell At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world's leading technology companies for 25 years, we move, st

Business Line Description: * NXP is the world leader in secure connectivity solutions for automotive, industrial & IoT, mobile and communication infrastructure markets. NXP's Automotive business unit offers sensor and processing technology th

Who You'll Work With Cisco CRDC (China R&D Center) ASIC group is founded in 2006. We're using cutting edge methodologies and technology to develop ASICs for Data Center, switching, routing and security products. CRDC ASIC team has the full-scale of c

Job Responsibilities 1. Responsible for FPGA interface logic design 2. Responsible for FPGA algorithm logic design 3. Responsible for FPGA-related R&D work 4. Responsible for FPGA logic architecture design, simulation, and debugging 5. Responsible fo

Responsibilities 1, based on Model ARM server system performance and power consumption optimization 2. VirtualPrototyping based on user applications 3. Basic server system software and hardware system performance analysis. Qualifications 1. 7 years

Skills : System Analysis (Server)

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. As a Principal Design Engineer you will be responsible for scheduling, designing, developing, and supporting IP models of system level memo

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Description: The Cadence Palladium Platform is world most scalable emulation system that verifies most of the latest design innovations