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ViShare Technology Limited
Keyskills: ASIC,logic design,FPGA,Design Compiler,RTL,logic synthesis,DFT,static timing analysis...
Summary: Perform RTL coding and write synthesis script while optimizing timing, gate count and power. Functional verification by simulation and FPGA emulation and check coverage. Interface with back-end ..
Hong Kong
0 years
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Posted : February 2017
 

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