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1 - 6 of 6 Job(s)
Beijing New Talent Academy
Keyskills: ESL, science, IELTS, TOEFL, writing, kindergarten, Primary, secondary teaching China
Summary: Teach K-12 ESL/IELTS/TOEFL/Science/Cambridge/AP for Aug 2017! 15k-26k salary/Work Visa/one month competion bonus/promotion/teaching training/Child tuition fee discount/arrange assistant teaching f..
Beijing
0 years
Share
Posted : April 2017
ViShare Technology Limited
Keyskills: H.264,H.265,ffmpeg,Algorithm,Multithreading,codec porting,logic design,FPGA,IC design...
Summary: Port an H.265 C/C++ code to an embedded platform. Team work with hardware engineer to compromise between the video quality and hardware complexity. Benchmark video quality and profile the encode..
Hong Kong
0 years
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Posted : February 2017
ViShare Technology Limited
Keyskills: C language,Makefile,multi-threaded,Linux,kernel driver,OpenWRT,IoT,WiFi,WiMax,Bluetoo...
Summary: Develop software for video-streaming solutions. Develop and optimize wireless communication protocol. Develop automated system test cases. Wireless performance evaluation/tuning. Work closely with..
Hong Kong
0 years
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Posted : February 2017
ViShare Technology Limited
Keyskills: H.264,H.265,Algorithm,Multithreading,codec porting,logic design,FPGA,IC design,ASIC design
Summary: Port an H.265 C/C++ code to an embedded platform. Team work with hardware engineer to compromise between the video quality and hardware complexity. Benchmark video quality and profile the encode..
Hong Kong
0 years
Share
Posted : February 2017
ViShare Technology Limited
Keyskills: H.264,H.265,Algorithm,Multithreading,codec porting,logic design,FPGA,IC design,ASIC design
Summary: Port an H.265 C/C++ code to an embedded platform. Team work with hardware engineer to compromise between the video quality and hardware complexity. Benchmark video quality and profile the encode..
Hong Kong
0 years
Share
Posted : February 2017
ViShare Technology Limited
Keyskills: ASIC,logic design,FPGA,Design Compiler,RTL,logic synthesis,DFT,static timing analysis...
Summary: Perform RTL coding and write synthesis script while optimizing timing, gate count and power. Functional verification by simulation and FPGA emulation and check coverage. Interface with back-end ..
Hong Kong
0 years
Share
Posted : February 2017
 
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